1. Field of the Invention
Embodiments of the present invention relate generally to graphics processing and, more specifically, to a high speed comparator with digitally calibrated threshold.
2. Description of the Related Art
In many applications, computer systems process data that characterizes aspects of the physical world. Parameters of the physical world are inherently continuous and may include considerations such as frequency or volume of an audio tone, intensity of a light signal, or position of a work piece, among many other examples without limitation. Electrical sensors and transducers generate continuous analog signals that represent physical parameters. Accordingly, computer systems employ circuits, termed analog-to-digital converters (ADCs), to translate the continuous analog signals into discrete binary signals that the computer system can process.
ADCs include comparators to quantize the analog signal into elements, or bits, that represent the signal level. A typical comparator has two inputs, one input being the applied signal, and the other input being a reference level. When the input is greater than the reference level, the output is driven to a high logic state. Conversely, when the reference level is greater than the input, the output is driven to a low logic state. Thus, the comparator generates a single bit that provides a one-bit level of resolution of the applied signal. The threshold at which the output changes state characterizes each constituent comparator.
As an illustration, a comparator may have a reference level at the midpoint of the applied signal range. The resulting output indicates whether the applied signal is greater than the midpoint. A second comparator may have a reference level at twenty-five percent of the applied signal range. The resulting output indicates whether the applied signal is greater than twenty-five percent of the applied signal range. Additional comparators with varying reference levels provide an increasing resolution of the digital representation of the applied analog signal. For a computer system that is designed to have a resolution of N thermometer bits, a collection of N comparators form a quantizer that generates an N-bit representation of the applied signal.
A critical parameter of the performance of the quantizer is the linearity of the resultant digital output with respect to the applied analog input. The quantizer is configured such that there is an incremental increase in the threshold of the comparators for each successive bit. The linearity of the quantizer is determined by the matching of all the incremental increases in the thresholds of each constituent comparator.
Conventional ADCs include a pre-amplifier to scale the level of the input to the comparator. Efficient system operation entails a pre-amplifier with speed and bandwidth that is adequate to accommodate the bandwidth of the applied signal. Typical pre-amplifiers for application in ADCs are power hungry, and power usage increases as the required speed increases. Conventional ADCs further include a reference system that generates the required multiple reference levels. The reference system must be continuously powered in order to provide the various levels to all comparators included in the quantizer and is, therefore, an additional source of power usage within the computer system.
One drawback to the above approach is that conventional ADC's that include pre-amplifiers impose a speed restriction on the conversion process due to bandwidth limitation. Additionally, a continuously powered reference system incurs power consumption penalties that burden the overall system power budget. Further, mismatches in the thresholds of comparators limit the performance of the ADC by introducing non-linearity into the system.
As the foregoing illustrates, what is needed in the art is a more power efficient digital comparator.